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I need the instruction movlps with an immediate address that be 64 bits wide, which according to Intel manuals should be perfectly possible. So, something like this:

movlps xmm0, [0x7fffffffffa0]

But all what I get is NASM truncating the operand size to 32 bits and printing the corresponding warning:

sample.s:6: warning: dword data exceeds bounds

I have tried with different forms of the qword prefix without success.

Ciro Santilli OurBigBook.com
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dsign
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  • http://stackoverflow.com/questions/19415184/load-from-a-64-bit-address-into-other-register-than-rax – Ciro Santilli OurBigBook.com May 26 '15 at 06:42
  • BTW, normally you should use `movsd` to load 8 bytes and zero-extend into an xmm register. Use `movlps` only when you specifically want to merge with the old value of xmm0, or when targeting SSE1 without SSE2 available. (And in that case, you may want to break the false dependency on the old value with `xorps xmm0,xmm0` first.) – Peter Cordes Feb 24 '18 at 16:29
  • It's not the operand-size that's being truncated, it's the address being truncated to fit into a `[disp32]` addressing mode. (Or a `[RIP +disp32]` if you used `DEFAULT REL`, which is normally a good idea.) – Peter Cordes Feb 24 '18 at 16:44

2 Answers2

8

most x64 instructions don't take 64 bit immed.

unless I'm very mistaken you have to move through the rax register.

Joshua
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    Yes, x86-64 supports a 64-bit absolute addressing mode only for load/store of AL/AX/EAX/RAX, [like `mov rax, [0x7fffffffffa0]`](http://stackoverflow.com/questions/19415184/load-from-a-64-bit-address-into-other-register-than-rax). Alternatively, use `mov rdi, 0x7fffffffffa0` to put a 64-bit immediate into any register, and use a normal `[rdi]` addressing mode with any other instruction. – Peter Cordes Feb 24 '18 at 16:41
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I don't think you can do that. movlps loads or stores a value that's 64 bits wide, but immediate addresses and displacements are still limited to 32 bits in general. The best you can do is 

mov rax, 0x7fffffffffa0
movlps xmm0, [rax]

(the first mov may need to be movabs; I don't really know Intel syntax assembly)

zwol
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  • The `mov` mnemonic can use the `mov r64,imm64` encoding in NASM / YASM syntax, if the number is number is such that neither `mov r32, imm32` nor `mov r/m64, sign_extended_imm32` can do it. Only GAS requires the `movabs` mnemonic. – Peter Cordes Feb 24 '18 at 16:37